[ovs-discuss] Could anyone tell me whether there is a buffer between M2 and vswitchd?

[杨润垲]

hi all,
Recently, I analyze the performance of Open vSwitch. By reading the source code, I abstract the packet-receiving process as the model of Fig.1. Queue1 (denoting NIC DMA) is a buffer that stores the incoming packets. M1 processes the packets, and looks up the flow table to match an entry. If the match fails, the packet is sent to Queue2 in order to be handled by ovs-vswitchd. If successful, the packet will be sent out by M2, which finishes the left processing.
Please help me regarding this.
Thanks..
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